1. Field of the Invention
The present invention relates generally to semiconductor wafers, manufacturing and testing. More particularly, the present invention relates to a system and method to screen defect related reliability failures at the wafer-level in CMOS SRAMs.
2. Related Art
Fabrication of integrated circuit devices is a complicated process. Each step of the process impacts the overall reliability of the end product. Some defects are initially nonfatal, but can cause failures early in the life of a product. This is called infant mortality. Typically, failure rates decrease rapidity to a low value that remains steady until the end of the lifetime of the product when failure rates increase again. Plots of this data are called a bathtub curve. Various wear out mechanisms include hot-electron wear out, electromigration, and failure of antifuses in FPGAs.
“Burn-in” refers to the process of accelerating failures that occur during the infant mortality phase of component life in order to remove the inherently weaker IC's. The process has been regarded as critical for product reliability since the semiconductor industry began. There have been two basic types of burn-in. During the process known as “static” burn-in, temperatures are increased (to 125° C. for example, or sometimes decreased) while only some of the pins on a test IC are biased. No data is written to the IC, nor is the IC exercised under stress during static burn-in. During “un-monitored dynamic” burn-in, temperatures are increased while the pins on the test IC are exercised. Extensive infrastructure is typically required, including special burn-in boards and sockets for embedded logic SRAMs (static random access memories), and the like. In SRAMs that are fabricated in CMOS (complementary metal oxide silicon) technology, three or more metal layers are employed above the silicon substrate and are commonly sued for electrical connections in the SRAM memory array. One mode of early reliability failure of SRAMs is the formation of electrical shorts between laterally adjacent metal lines that are closely spaced. Such shorts are believed to be caused by the presence of metal stingers due to incomplete metal etching, polishing, or defects that are deposited on various layers during wafer processing. The inventors have discovered that infant mortality in SRAMs can occur when adjacent, closely spaced metal lines with stingers in between them short due to breakdown of the oxide separating the defect/stinger and an adjacent metal line. Such defects can be screened at wafer sort instead of burn-in for packaged devices.
Various burn-in testing procedures and circuits are known. Examples include the following U.S. Pat. No. 5,504,369 to Dasse et al. (which describes an apparatus for performing wafer level testing), U.S. Pat. Nos. 5,835,427 and 6,037,792, both to McClure, and U.S. Pat. No. 5,956,279 to Mo et al. (which each describe a specific SRAM burn-in test circuit), and U.S. Pat. No. 6,118,138 to Farnworth et al. (which describes an overview of burn-in and discloses a wafer having integrated therein circuitry to simplify wafer level probing).
What is desired, however, is a technique for specific screening at wafer sort for stingers between closely spaced metal lines, without the need of elevated temperatures, special boards or sockets.